Wednesday, 29 February 2012

VHDL Code for 16x1 Mux using 4x1 Mux


 kanhe_Code for 16:1 Mux using 4:1
Library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;

entity kanhe_4x1mux is
port(a,b,c,d : in std_logic;
S0,s1 : in std_logic;
q : out std_logic);
end kanhe_4x1mux;

Architecture kanhe_4x1mux1 of kanhe_4x1mux is
Begin
Process(a,b,c,d,s0,s1)
Begin

If s0 ='0' and s1 ='0' then q <= a;
Elsif s0 ='1' and s1 ='0' then q <= b;
elsif s0 ='0' and s1='1' then q <= c;
else q <=d;
end if;
End process;
End kanhe_4x1mux1;


Main program
Library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;

entity kanhe_16x1mux is
port(a:in std_logic_vector(15 downto 0);
 s: in std_logic_vector(3 downto 0);
Z:out std_logic);
End kanhe_16x1mux;

Architecture kanhe_16x1mux1 of kanhe_16x1mux is
signal z1,z2,z3,z4:std_logic;


component kanhe_4x1mux is
port(a,b,c,d,s0,s1:in std_logic;
Q:out std_logic);

End component;

Begin
M1: kanhe_4x1mux port map(a(0),a(1),a(2),a(3),s(0),s(1),z1);
m2:
kanhe_4x1mux port map(a(4),a(5),a(6),a(7),s(0),s(1),z2);
m3:
kanhe_4x1mux port map(a(8),a(9),a(10),a(11),s(0),s(1),z3);
m4:
kanhe_4x1mux port map(a(12),a(13),a(14),a(15),s(0),s(1),z4);
m5:
kanhe_4x1mux port map(z1,z2,z3,z4,s(2),s(3),z);


End kanhe_16x1mux1;

10 comments:

  1. Very nice work and collection .............

    Thank you sir

    ReplyDelete
  2. this code is not running, showing error

    ReplyDelete
    Replies
    1. There was a minor mistake in the code.Now the code is working correctly .Hope it will help you................thanks

      Delete
    2. Thanx bro, 4 ur codes. Its very much helpful

      Delete
  3. this code is very wrong dude...in the process only sequential execution is done..so u cant write there an if else statement..god bless you

    ReplyDelete
    Replies
    1. the code is perfect & in principle the multiplexer is a combinational logic circuit and in structural modelling style the process statement is not required..........

      Delete
  4. You should have given diagram of your main program...so that it would have been easy for students to understand...still u r superb..

    ReplyDelete
    Replies
    1. yes soon the diagram will be attached........

      Delete